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  fremont micro devices FT821X preliminary www.fremontmicro.com page 1 of 6 ds821x ?a3 transition-mode pfc controller features description ? transition - mode control of pfc pre-regulator ? low input current thd ? ultra-low ( 50 a) start up current ? low ( 3.5 ma) quiescent current ? precise internal reference voltage ? zero-current switching ? leading edge blanking instead of rc filtering ? clamp gate output voltage ? adjustable line compensation ? adjustable output overvoltage protection ? vcc over voltage protection ? open control loop protection ? ic over temperature protection(otp) ? disable function ? dip-8/sop-8 packages applications ? iec61000-3-2 compliant smps ( tv, desktop pc, monitor) up to 150w ? hi-end ac-dc adapter/charger ? entry level server & web server the FT821X is a current-mode pfc controller operating in transition mode (tm). the FT821X has rich protections. it provides a controlled on-time to regulate the output dc voltage and achieve natural power factor correction. the highly linear multiplier makes the device capable of working in wide input voltage range applications (from 85v to 265v) with an excellent thd. the output voltage is controlled by means of a voltage-mode error amplifier and a precise internal voltage reference. the device features extremely low consumption and includes a disable function suitable for ic remote on/off control, which makes it easier to comply with energy saving norms. an effective two-step ovp enables to safely handle overvoltages either occurring at start-up or resulting from load disconnection. the totem-pole output stage is capable of driving a mosfet or igbt with source and sink currents of 400ma typically. the device is operating in transition mode and it is optimized for electronic lamp ballast application, ac-dc adapters and smps.
fremont micro devices FT821X preliminary typical application circuit 521 8 3 6 4 7 FT821X bridge c1 r4 r5 d4 c5 r6 t d3 c6 r14 r8 c7 d2 r7 ntc r11 r12 r13 c8 r10 r9 r3 c2 c3 c4 r1 r2 vac 85v to 265v q1 d1 + - r15 figure 1: typical application circuit absolute maximum ratings vcc to gnd????????????????????????????????? -0.3v to +28v inv to gnd ????????????????????????????....???? -0.3v to +7v comp to gnd?????????????????????????????????-0.3v to +7v mult to gnd????????????????????????????????. ..-0.3v to +7v cs to gnd?????????????????????????????????.... ... -0.3v to 7v izcd?????????????????????????????? -5ma (source) / 5ma(sink) operating temperature range????????????????????????? -40 to +125 junction temperature????????????????????????????. ...-40 to +150 storage temperature range ??????????????????????????. -40 to +150 esd protection hbm?????????????????????????????????.3500v esd protection mm?????????????????????????????... ???... . 200v * stresses exceed those listed under ?absolute maximum ratings? may cause permanent damage to the device. functional operation of the device at condit ions beyond those listed in the specification is not guaranteed. prolonged exposure to extreme conditi ons may affect device reliability or functionality. www.fremontmicro.com page 2 of 6 ds821x ?a3
fremont micro devices FT821X preliminary pin configuration inv comp mult cs vcc gd gnd zcd top view 1 2 3 45 6 7 8 figure 2: pin assignments terminal description no. pin function 1 inv inverting input of error amplifier. the information on the output voltage of the pfc pre-regulator is fed into the pin through a resistor divider. the pin also as an on/off control input. 2 comp output of the error amplifier. a compensation network is placed between this pin and inv ( pin #1) to achieve stability of the voltage control loop and ensure high power factor and low thd. 3 mult main input to the multiplier. this pin is connected to the rectified mains voltage via a resistor divider and provides the sinusoidal reference to the current loop. 4 cs input to the pwm comparator. the current flowing in the mosfet is sensed through a resistor, the resulting voltage together with line compensation voltage is applied to this pin and compared with an internal sinusoidal-sha ped reference, generated by the multiplier, to determine mosfet?s turn-off. 5 zcd boost inductor?s demagnetization sensing in put for transition-mo de operation. a negative-going edge triggers mosfet?s turn-on. 6 gnd ground. 7 gd gate drive output. the totem pole output stage is able to drive power mosfet?s and igbt?s. the high-level voltage of this pin is clamped at about 14v to avoid excessive gate voltages in case the pin is supplied with a high vcc. 8 v cc supply voltage of both the signal part of the ic and the gate driver. table1 www.fremontmicro.com page 3 of 6 ds821x ?a3
fremont micro devices FT821X preliminary ordering information ft821 ? www.fremontmicro.com page 4 of 6 ds821x ?a3 table 2 designator symbol dual output voltage a no b yes symbol package type a sop-8 b dip-8 1 2 3 45 6 8 7 ft821 ?? marking rule figure 3 represent with or without dual output voltage function ?? for internal reference
fremont micro devices FT821X preliminary pakaging information dip ? 8 package dimensions in millimeters dimensions in inches symbol min max min max a 3.710 4.310 0.146 0.170 a1 0.510 0.020 a2 3.200 3.600 0.126 0.142 b 0.380 0.570 0.015 0.022 b1 1.524 bsc 0.060 bsc c 0.204 0.360 0.008 0.014 d 9.000 9.400 0.354 0.370 e 6.200 6.600 0.244 0.260 e1 7.320 7.920 0.288 0.312 e 2.540 (bsc) 0.100 bsc l 3.000 3.600 0.118 0.142 e2 8.400 9.000 0.331 0.354 www.fremontmicro.com page 5 of 6 ds821x ?a3
fremont micro devices FT821X preliminary sop ? 8 package dimensions in millimeters dimensions in inches symbol mix max min max a 1.350 1.750 0.053 0.069 a1 0.100 0.250 0.004 0.010 a2 1.350 1.550 0.053 0.061 b 0.330 0.510 0.013 0.020 c 0.170 0.250 0.006 0.010 d 4.700 5.100 0.185 0.200 e 3.800 4.000 0.150 0.157 e1 5.800 6.200 0.228 0.244 e 1.270 (bsc) 0.050 bsc l 0.400 1.270 0.016 0.050 0 8 0 8 www.fremontmicro.com page 6 of 6 ds821x ?a3


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